Glitch detection not active by default in Silicon Labs Secure Vault High devices

published 2024-01-03 2 y ago modified 2026-06-17 4 mo ago also EUVD-2023-57476

cvss: 6.8; version 3.1, CNA
cisa kev: Not listed; not in CISA's catalog
epss: 0.3%; EPSS 0.3% chance of exploitation in 30 days, percentile 19%
public exploits: 0; none known

Glitch detection is not enabled by default for the CortexM33 core in Silicon Labs secure vault high parts EFx32xG2xB, except EFR32xG21B.

Patch / fix

fixed in 1

silabs.com GSDK 4.4.0

CISA SSVC

Exploitation: none
Automatable: no
Technical impact: total
Assessed: 18 mo ago (2025-05-08)

Exploit prediction

0.27% chance of exploitation in the next 30 days, higher than 19% of all scored CVEs (FIRST EPSS, 2026-11-08).

CVSS scores

assigned by	version	score	vector
CNA	3.1	6.8	CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H
NVD	3.1	6.8	CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H

Affected products

silabs.com GSDK

Classification

Weakness

CWE-1319 Improper Protection against Electromagnetic Fault Injection (EM-FI)
CWE-909 Missing Initialization of Resource

References

github.com /SiliconLabs/gecko_sdk
product
community.silabs.com /069Vm0000004f6DIAQ
permissions-required

Sources

CVE List CVE-2023-5138
NVD CVE-2023-5138

Fencer Vulns keeps one entry per vulnerability: the CVE id wins, then GHSA, and records that alias each other are merged, except that two CVEs always keep separate entries. The same data is available as JSON.

Summary