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Fencer Vulns
medium 4.4

CVE-2020-24491 json

Debug message containing addresses of memory transactions in some Intel(R) 10th Generation Core Processors supporting SGX may allow a privi…

published 2021-02-17 5 y ago modified 2026-06-17 4 mo ago also EUVD-2020-17211

cvss
4.4
version 3.1, NVD
cisa kev
Not listed
not in CISA's catalog
epss
0.3%
EPSS 0.3% chance of exploitation in 30 days, percentile 22%
public exploits
0
none known

Summary

Debug message containing addresses of memory transactions in some Intel(R) 10th Generation Core Processors supporting SGX may allow a privileged user to potentially enable information disclosure via local access.

Patch / fix

  • intel-ucode Arch Linux 20220207-1

arch linux advisories AVG-1590

Exploit prediction

0.30% chance of exploitation in the next 30 days, higher than 22% of all scored CVEs (FIRST EPSS, 2026-11-08).

CVSS scores

assigned by version score vector
NVD 3.1 4.4 CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:U/C:H/I:N/A:N
NVD 2.0 1.9 AV:L/AC:M/Au:N/C:P/I:N/A:N

Affected products

  • n/a Intel(R) 10th Generation Core Processors supporting SGX

Classification

Weakness
  • CWE-20 Improper Input Validation

References

Sources

Fencer Vulns keeps one entry per vulnerability: the CVE id wins, then GHSA, and records that alias each other are merged, except that two CVEs always keep separate entries. The same data is available as JSON.